Intel Might Merge Memory Controller Onto The Compute Die With Panther Lake, Attempting To Fix Deep-Rooted CPU Latency Issues

Intel is rumored to be integrating Panther Lake’s memory controller & compute die into a single package to address the latency issues in current architectures.

Intel Will Seemingly Experiment With Panther Lake When It Comes To Fixing Latency Issues & Enhancing D2D Interconnect By Incorporating the Memory Controller Back To The Compute Tile, But Nova Lake Might Be Reverting It Back

Well, it looks like Team Blue isn’t satisfied with existing tile configurations and is probably looking to switch things up with the release of its next-gen mobile SoCs, with a major change expected to occur with the IMC (Integrated Memory Controller) and the Compute die.

The renowned leakers kopite7kimi and Jaykihn have disclosed that Intel plans on putting the IMC and compute die into a single package in an attempt to fix performance and efficiency issues encountered with lineups such as the Arrow Lake, and it is said to be more of a “hit and trial” move.

Although PTL will reintegrate IMC into the compute die, NVL will once again separate and optimize it.

— kopite7kimi (@kopite7kimi) October 26, 2024

Subsystems traditionally located on a separate SOC tile are moved to the compute tile in PTL due to the lack of a dedicated SOC tile.

The lack of a dedicated SOC tile is due to scale.

— Jaykihn (@jaykihn0) October 26, 2024

With Intel’s Arrow Lake, the IMC and Compute die are presented as two separate entities, and with the IMC being an off-die solution, data transfer has become much more inefficient now. It had to travel across dies to reach the memory controller…