For the better part of a decade, AMD’s desktop Ryzen chips have lived inside a self-imposed boundary: eight cores per chiplet, no exceptions. That has been the fundamental building block of everything from entry-level Ryzen 5 parts to the 16-core flagship Ryzen 9 processors. With the next-gen Ryzen 10000 series, codenamed “Olympic Ridge,” that boundary is finally about to come down.
A leak from hardware tipster HXL, who has a solid track record on AMD roadmap details, reveals seven different processor configurations that will arrive under the Ryzen 10000 banner, built on AMD’s next-generation Zen 6 microarchitecture. For the first time, Team Red moves to 12-core compute chiplets (CCDs), up from the 8-core units it’s used since Zen 2.
AMD is reportedly to use TSMC’s cutting-edge N2 (2nm) process node for the CCDs. More importantly, industry whispers believe AMD might change its chiplet interconnects. If the company uses a low-cost, passive silicon bridge to link the CCD and the I/O die, it will reduce memory latency, which has plagued Ryzen processors in the past.
6 8 10 12
8+8 10+10 12+12— HXL (@9550pro) February 19, 2026
In AMD’s chiplet design logic, the CCD is the reusable core unit that can be duplicated to create high-end SKUs. If the ceiling for single CCD increases from 8 to 12 cores, it will restructure every tier. Single-CCD configs would cover 6, 8, 10, and 12 cores, while dual-CCD structure will stack them for 16, 20, and 24-core builds. The 24 cores flagship would be the maximum core count ever shipped in a mainstream Ryzen desktop processor, and will surpass the current 16-core ceiling (lasted through generations) with the release of Ryzen 10000 CPUs.
Every new CCD is also reported to have 48 MB of L3 cache, so a dual-CCD (non-X3D) SKU would include 96 MB total — a solid jump for tasks that need high cache, like content creation, simulations, and specific development setups. For gamers, the IPC and clock speed improvements rumored for Zen 6 may matter even more than raw core count. Core scaling only helps if the architecture properly feeds the cores.
For compatibility, Team Red has confirmed that Zen 6 will support AM5 motherboards, which will extend the socket’s lifespan and protect the investment for all users who upgraded their PCs in the last two years. Intel keeps changing sockets every generation or two, but doesn’t offer the same flexibility, and PC builders hate it.
Intel’s Nova Lake deserves attention, though, as the rumored specs are wild. Nova Lake’s chipsets will come equipped with 52 cores and roughly 288 MB of bLLC cache, a workstation monster built for people who need parallel processing power for heavy work like video editing, rendering, and simulation work.
The Tale of the Tape
| Feature | AMD Zen 6 “Olympic Ridge” Flagship | Intel “Nova Lake” Core Ultra 9 Flagship |
|---|---|---|
| Max Core Count | 24 Cores (12+12 P-cores) | 52 Cores (16P + 32E + 4LPE) |
| Socket / Platform | AM5 (Existing) | LGA 1954 (New 900-Series Chipset) |
| Architecture Approach | Uniform chiplets via Silicon Bridge | Hybrid Compute Tiles + SoC |
| Max Native Cache | 96 MB L3 (Non-X3D) | Up to 288 MB (bLLC) |
| Power Draw (Rumored) | Expected to align with current TDPs | ~400W PL2 (Spikes up to 700W unlocked) |
AMD and Intel are likely targeting different users for now. AMD is playing the long game with platform stability, while Intel wants to go after the high core count crown. Both strategies make sense. A spec war where everyone copies each other would be boring. This way, buyers will have better and different choices to get what they need. If you have any plans to upgrade to a high-end PC in late 2026 or early 2027, the divergence between AMD and Intel will largely dictate your budget and cooling options.
AMD focuses on more than just high core counts with Zen 6. The new architecture will bring fast clock speeds and better instructions per clock. We can’t decide who’ll be the winner yet. Intel hasn’t even shipped its Arrow Lake refresh, and AMD has kept most Ryzen 10000 details under the Olympic Ridge codename. Real performance data will stay thin until official benchmarks arrive. I just hope that when these flagship chips hit shelves, we’ll get lucky and DDR5 RAM prices will settle down.
